T3.2: Development of alternative handling substrates [M04-M24]

The objective of this task is to assess different ways to optimize substrate performance (e.g., via layers thickness) and explore novel approaches for the creation of alternative low-losses substrates (as e.g., p-n junctions underneath the BOX; incorporation of porous Si substrate, ...). Porous Si was put forward by different groups (including our group, patent no. BE2018/0034) as a perspective material for the substrate with good RF performances. P-N junctions underneath the BOX were recently proposed at UCL as a new approach to improve RF properties of the substrate (patent no. EP18170439). We have demonstrated that these PN junctions induce depletion zones underneath the BOX allowing for drastic reduction of the RF performance degradation due to surface parasitic conduction. However, both these approaches need further developments, characterization and optimization for concrete application addressed in HOMEMADE; to assure their robustness for space applications and their transferability to industrial world. The fabrication work will be mostly driven by UCL in its cleanroom (Winfab). Concerning porous Si, the porosification process has to be adapted in close collaboration with SOI and Soitec (FR). For that, SOI will receive the alternative low-losses substrates and will manage bounding process e.g., Smart-CutTM, under SOITEC control, in order to integrate the LiTaO3 layer with the received substrates. RF testing structures will also be required to be fabricated and incorporated during this integration task to evaluate the performance of the alternative substrates (required for tasks 3.5 and 3.6). As mentioned in task 3.1, the design of the structures to be implemented will be agreed between SOI, UCL and INC. Other possible ideas of alternative substrate could come during execution of the projects. Physical process and device simulation tools will be extensively used in order to predict results of different possible optimizations (either structural or processing) and make our trials more efficient. INC will focus on the electro- mechanical, acoustic simulations (using COMSOL tool) and UCL will complement this by the electrical simulations in a wide frequency and temperature ranges (using Silvaco and Synopsis tools).
Different substrates will be extensively characterized. The same test vehicle and extensive characterization approach (developed in T3.1) will be used for the all the substrates. UCL will perform electrical characterization in a wide- frequency range at different temperatures (from 77 to 500 K) and INC will be focus on material physical characterization using Raman.
At M24, comparing the available at that moment characterization results with respect to the specifications, Consortium will decide (M3.4) on the alternative substrate which will be preselected to pursue the further developments as filter manufacturing (front-end and packaging) by SOI (WP2,4) and evaluation at ALT (WP5). Nevertheless, all the viable alternative developed substrates will continue extensive evaluation and benchmarking (T3.3-T3.6) to assess deeper their perspectives (benefits and weaknesses of every solution).